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DM74S240 * DM74S241 * DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver
August 1986 Revised May 2000
DM74S240 * DM74S241 * DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver
General Description
These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs, and can be used to drive terminated lines down to 133.
Features
s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at data inputs improves noise margins s Typical IOL (sink current) s Typical IOH (source current) Inverting Noninverting 4.5 ns 6 ns 64 mA -15 mA
s Typical propagation delay times
s Typical enable/disable times 9 ns s Typical power dissipation (enabled) Inverting Noninverting 450 mW 538 mW
Ordering Code:
Order Number DM74S240N DM74S241N DM74S244N Package Number N20A N20A N20A Package Description 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagrams
DM74S240N
DM74S241N
DM74S244N
(c) 2000 Fairchild Semiconductor Corporation
DS006478
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DM74S240 * DM74S241 * DM74S244
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 5.5V 0C to +70C -65C to +150C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 -15 64 70 Typ 5 Max 5.25 Units V V V mA mA C
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted) Symbol VI Hys VOH Parameter Input Clamp Voltage Hysteresis (VT+ - VT-) (Data Inputs Only) HIGH Level Output Voltage VCC = 4.75V, VIH = 2V VIL = 0.8V, IOH = -1 mA VCC = Min, VIH = 2V VIL = 0.8V, IOH = -3 mA VCC = Min, VIH = 2V VIL = 0.5V, IOH = Max VOL IOZH IOZL II IIH IIL IOS ICC LOW Level Output Voltage Off-State Output Current, HIGH Level Voltage Applied Off-State Output Current, LOW Level Voltage Applied Input Current at Maximum Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current Outputs LOW Outputs Disabled
Note 2: All typical values are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time and duration should not exceed one second.
Conditions VCC = Min, II = -18 mA VCC = Min
Min
Typ (Note 2) 0.4
Max -1.2
Units V V
0.2
2.7 2.4 2 0.55 50 -50 1 50 Any A Any G -50 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74S244 80 95 100 120 100 120 -400 -2 -225 135 160 150 180 150 180 mA V A A mA A A mA mA 3.4 V
VCC = Min
IOL = Max
VIL = 0.8V, VIH = 2V VCC = Max VO = 2.4V VIL = 0.8V VIH = 2V VO = 0.5V
VCC = Max VI = 5.5V VCC = Max VI = 2.7V VCC = Max VI = 0.5V VCC = Max (Note 3) Outputs HIGH
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2
DM74S240 * DM74S241 * DM74S244
Switching Characteristics
VCC = 5V, TA = 25C Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tPLH tPHL tPZL tPZH Parameter Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to LOW Level Output Enable Time to HIGH Level Output Disable Time from Low Level Output Disable Time from High Level Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to LOW Level Output Enable Time to HIGH Level CL = 45 pF RL = 90 CL = 45 pF RL = 90 CL = 45 pF RL = 90 CL = 45 pF RL= 90 CL = 5 pF RL = 90 CL = 5 pF RL = 90 CL = 150 pF RL = 90 CL = 150 pF RL = 90 CL = 150 pF RL = 90 CL = 150 pF RL = 90 Conditions DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 DM74S240 DM74S241, DM74244 Min 2 2 2 2 3 3 2 3 4 2 2 2 3 4 3 4 6 6 4 4 Max 7 9 7 9 15 15 10 12 15 15 9 9 10 12 10 12 21 21 12 15 Units ns ns ns ns ns ns ns ns ns ns
3
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DM74S240 * DM74S241 * DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 4 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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